Обучение чтению литературы на английском языке по специальности «Конструирование и технология электронно-вычислительной аппаратуры». Часть 3

Московский государственный технический университет
имени Н. Э. Баумана

О. И. Комарова, Е. И. Румянцева

Обучение чтению литературы на английском
языке по специальности «Конструирование
и технология электронно-вычислительной
аппаратуры»

Учебно-методическое пособие

Часть 3

Москва
Издательство МГТУ им. Н. Э. Баумана
2010

УДК 802.0
ББК 81.2 Англ.-923
К63

Комарова О. И.
К63
Обучение чтению литературы на английском языке по специальности «Конструирование и технология электронно-вычислительной
аппаратуры»: учеб.-метод. пособие / О. И. Комарова, Е. И. Румянцева. — ч. 3. — М.: Изд-во МГТУ им. Н. Э. Баумана, 2010. — 36, [2] с. :
ил.
Пособие состоит из двух тематических разделов: первый включает тексты о технологии CMOS, второй — о нанотехнологиях. Отдельно
предлагаются тексты для ознакомительного чтения и краткого изложения содержания прочитанного. Тексты представляют собой статьи (или
извлечения из статей) англоязычных авторов. Пособие содержит также
упражнения на понимание текста, отработку и закрепление лексико-грамматических конструкций, развитие навыков устной речи.
Для студентов 4-го курса, обучающихся по специальности «Конструирование и технология электронно-вычислительной аппаратуры».

УДК 802.0
ББК 81.2 Англ.-923

c⃝ МГТУ им. Н. Э. Баумана, 2010

Предисловие

Настоящее пособие предназначено для студентов седьмого семестра, обучающихся по специальности «Конструирование и технология электронно-вычислительной аппаратуры».
В пособии представлены оригинальные тексты, по степени
трудности соответствующие экзаменационным текстам.
Пособие состоит из трех тематических разделов: первый посвящен традиционным технологиям, второй — нанотехнологиям, третий включает тексты для ознакомительного чтения и краткого изложения (rendering).
Каждый текст, предназначенный для чтения и перевода, сопровождается упражнениями на отработку лексико-грамматических
конструкций и повторение материала, вызывающего наибольшие
трудности на экзамене.
Студенты должны научиться не только опознавать и понимать
соответствующие лексико-грамматические конструкции, но и употреблять их в речи. За упражнениями на повторение и активизацию
навыков устной речи следуют вопросы к тексту — это финальная
стадия освоения текста, подводящая к монологическому высказыванию. Завершает работу над материалом устное изложение основных
положений текста.
Текстам из уроков Unit 1 и Unit 2 соответствуют тексты для
ознакомительного чтения.
Отметим, что авторы сознательно не стали давать вокабуляр
к каждому тексту, так как предполагается, что студенты хорошо
знакомы с лексикой по материалам предыдущих семестров.
Содержание пособия позволяет студентам охватить широкий
спектр информации по своей специальности, усовершенствовать
навыки, умения и знания в области английского языка и успешно
подготовиться к экзамену.

3

Unit 1. CMOS Technology

1. Read and translate the text.
Text 1
The Importance of Moor’s Law
The performance of integrated circuits has been improving exponentially for more than thirty years. In the next few years, the industry
must overcome several technological challenges to sustain this pace of
improvement.
The remarkable characteristic of transistors that lies under the rapid
growth of the information technology industry is that their speed increases and their cost decreases as their size is reduced. The transistors
manufactured today are 50 times faster and occupy less than 1 % of the
area of those built 20 years ago. It seems intuitively obvious that continued reduction of the area of a transistor by a factor of 2 every three
years cannot be sustained forever. The predicted “limit” has been dropping at nearly the same rate as the size of the transistors. The accuracy
of a prediction of the future of CMOS technology is therefore not likely
to be very great. However, the key principles underlying the evolution
of CMOS technology can give us some insight into the future.
A recent research pointed out that the particular transistors in dominant use today (complementary p-type and n-type field-effect transistors,
called CMOS) will soon have a lower rate of performance increase as
their size is reduced. It is concluded that the current rate of transistor
performance improvement can be sustained for another 10 to 15 years,
but only through the development of new materials and transistor structures. In addition, a major change in lithography will be required to
continue size reduction. Memory technology for DRAM products is similarly reaching a major hurdle and requires a new architecture to move
beyond 8 Gb levels. The most common description of the evolution of

4

CMOS technology is known as Moore’s law. The observation made by
Gordon Moore in 1965 was that the number of components on the most
complex integrated circuit chip would double each year for the next
10 years.
In 1975 Moore noted with amazement that his previous prediction
had come true. He predicted, however, that in the future the number
of components per chip would require nearly two years rather than one
year to double. In the last 30 years this prediction has been remarkably
realized and has gained the status of a law. The term Moore’s law has
come to refer to the continued exponential improvement in the cost per
function that can be achieved on an integrated circuit.
The importance of Moore’s law lies not in the constancy of the rate
of increase but in the root cause and in the effect of the trend. Moore
pointed out doubling of the number of components on an integrated
circuit was due to three factors. First, and most significant, half of the
increase is derived from improvement in lithographic resolution. Second, 25 % of the increase is due to larger chip sizes, made possible by
enhanced manufacturing techniques and better lithography. Third, the
remaining 25 % is due to innovation, such as more creative techniques
for forming the components, predominantly transistors, on a chip. These
three factors are the driving forces behind the trend for increasing the
number of components on a chip.
Moore also pointed out that the result of this increase in components per chip is a lower cost per component Performance was not an
explicit parameter addressed in Moore’s law. However, associated with
the increase in the number of transistors on a chip is the improvement in
performance. This is not an automatic consequence, but rather the result
of careful design.
The increase in processor performance results from both an increase
in density and an improvement in transistor design. The key to understanding the future of CMOS technology is to understand the factors
influencing the cost per function. CMOS will continue to dominate and
evolve as long as the net cost per function drops. The key elements
behind this trend are:
1. Lithography to enable the manufacturing of components with
smaller dimensions.

5

2. Proper transistor design to achieve higher performance at smaller
dimensions as well as innovative layout to gain density.
3. More effective interconnections to increase the component density.
4. New circuit families.
5. Innovative, denser memory cells.
6. More productive design processes.

1/1. Find the following expressions in the text and give their Russian
equivalents.
To improve exponentially; pace of improvement; intuitively obvious; to sustain the pace; to drop at the rate; key principles; insight into
the future; field-effect transistors; major hurdle; to come true; enhanced
manufacturing techniques; automatic consequences.

1/2. Fill in the blanks with the appropriate words.
1. The transistors ... today are 50 times faster than those built
20 years ago.
2. ... of a prediction of the future of CMOS technology is not likely
to be very great.
3. A major change in ... will be required to continue size reduction.
4. In the last 30 years Moor’s prediction has been remarkably ... .
5. Moor’s law refers to the ... ... improvement in the cost per function.
6. Moor pointed out ... of the number of components on an IC was
due to the three factors.
7. Half of the increase is derived from improvement in ... .
8. Larger chip sizes are possible due to ... manufacturing techniques.
9. Innovation means more ... techniques for forming the components.
10. The result of the ... in components per chip is a lower ... per
component.

1/3. Say what these figures in the text refer to.
1 %; 8 Gb; 1965; 1975; 25 %; 3.

1/4. Find the answers to the questions.
1. What is CMOS technology?

6

2. What is known as Moor’s law?
3. What observation did Moor make in1965?
4. What were the corrections made by Moor in 1975?
5. Where does the importance of Moor’s law lie?
6. What are the three factors influencing the number of components
on an IC?
7. What does the increase in processor performance result from?
8. Is it important to understand the future of CMOS technology?
Why?

1/5. Find the non-finite forms of the verb in the text and specify their
functions.

1/6. Give the summary of the text.

2. Read and translate the text.

Text 2
Lithography
Lithography is the means by which patterns are delineated on wafers
and is therefore the primary driving force behind the reduction of the
size of transistors. Optical (approximately visible wavelength light)
lithography was once thought to be limited to 0.1-mm resolution, but
the industry is now moving to 0.65-mm resolution in manufacturing.
One interesting point to note is that recent progress in lithography has exceeded the pace of most predictions. One way to discuss
lithography is in terms of linear dimensions, comparing the smallest
feature to be patterned with the wavelength of the light used for the
lithographic process. The first widely used light sources in the industry were mercury lamps, leading to a focus on the specific emission
lines of mercury. All of the features defined had dimensions greater
than the wavelength. In recent years, the so-called g-line and i-line, with
wavelengths of 435 nm and 365 nm, respectively, have become industry
standards. The 365-nm light source has been used to pattern features
as small as 0.35 mm, essentially equal to the wavelength. Below halfmicron dimensions, a transition to deep ultraviolet (DUV) light sources
(either mercury source or, increasingly, excimer lasers) at 248-nm wavelength has enabled lithographers to pattern 0.25-mm dimensions, also

7

equivalent to the wavelength. The industry is now moving to 0.18-mm
lithography, marking the first time that features smaller than the wavelength are being patterned. Future lithography will require patterning
features smaller than the wavelength and/or further reductions in the
wavelength, perhaps through the adoption of an entirely new exposure
source.
Patterning features smaller than the wavelength of the exposure
source leads to significant challenges due to the diffraction of light.
Optical proximity correction techniques are therefore a critical part of
enabling future lithography. Various techniques such as off-axis illumination and phase-shift masking enable the patterning of features smaller
than the wavelength. The tradeoff requires more complex, costly masks
and possible design constraints. Potentially, it may be possible to define
features down to half the dimension of the wavelength. The properties
of the photoresist itself (the light-sensitive exposed polymer) are also
critical to the feature resolution achievable. Achieving dimensions of
100 nm and below will therefore quite likely require a reduction of the
source wavelength. The industry is actively engaged in preparing for a
transition from 248 nm (with KrF excimer lasers) to 193 nm (with ArF
excimer lasers). Beyond that, there appears to be no industry consensus
concerning the next generation lithography. The next possible small step
in wavelength could be at 157 nm (with F excimer lasers).
However, few materials are sufficiently transparent to be used in refractive lenses or in masks. Calcium fluoride is a leading candidate, but
with its coefficient of thermal expansion nearly 40 times that of quartz, it
may be difficult to avoid distortion. Special forms of quartz may be usable for masks, but acceptable photoresist materials for this wavelength
have not yet been developed. Several non-optical lithography techniques
are being explored in the industry. Electron-beam lithography is capable
of defining extremely small feature size due to an effective wavelength
of the electrons of about 0.01 nm. E-beam lithography has long been
used for mask-making and for low-throughput wafer exposures. However, the use of e-beam lithography for chip fabrication will require
greatly increased throughput. Schemes for achieving sufficient throughput by using large-area electron beams with blocking masks and electrooptic reduction lenses are being explored. Two such efforts are PRE
8

VAIL and SCALPEL. The key problems to be solved are field stitching
(multiple masks are needed to cover a single chip), mask integrity, and
cost. Proximity X-ray lithography has been used by IBM to fabricate exploratory integrated circuits at dimensions from 1 mm down to 0.15 mm.
The 1.1-nm wavelength is extracted from synchrotron radiation, such as
that obtained from the Helios ring built by Oxford Instruments and installed at the IBM technology development facility in East Fishkill, New
York. The primary concern is that lenses and mirrors are not available
for these wavelengths. Blocking masks must be used with features of
the same dimension as that on the wafer. The cost and difficulty of fabricating these masks without distortion are key challenges. Other issues
concern the close proximity (10 mm or less) required between the mask
and the wafer and the associated diffraction effects. X-ray projection
lithography, euphemistically named EUV for extreme ultraviolet light,
tries to avoid the 13-mask issue by using 11–13-nm-wavelength light.
At that wavelength, it may be possible to construct reflective lenses and
reticles with a 43 dimension-reduction system. However, the system
requires concave lenses composed of a super lattice of approximately
40 layers of 2–3-nm films, with a local and global uniformity of atomic
dimensions.
Other, more exploratory approaches such as ion-beam lithography or
hot-electron emission lithography are being investigated. At this time,
however, none of these approaches has a high probability of succeeding, and all would require major resource investment to realize. The
message is that lithography, the major component of Moore’s law, will
face enormous challenges in the coming years. Optical extensions will
require radical changes to shorter-wavelength light. Non-optical techniques remain to be proven. The biggest risk is that the cost of a new
system might be greater than the derived benefit of component density.
Although exposure system costs might be amortized over many products, high mask costs must be borne by each product. Moore’s law will
continue to be effective only as long as the cost per component continues
to drop.

2/1. Find the answers to the following questions.
1. What is lithography?

9

2. What does it mean “to discuss lithography in terms of linear dimensions”?
3. What kind of patterning features will future lithography require?
4. What is a critical part of enabling future lithography?
5. What does trade off require?
6. What are the drawbacks of optical lithography?
7. What is electron-beam lithography?
8. What are the key problems to be solved about e-beam lithography?
9. What is X-ray lithography?
10. What are the main challenges of this technique?
11. What other techniques are mentioned in the text?

2/2. Correct the following statements.
1. Recent progress in lithography has exceeded the pace of some
predictions.
2. The first widely used light sources in the industry were electric
lamps.
3. Below half-micron dimensions, a transition to deep ultra red light
sources has enabled lithographers to pattern 0.25 mm dimensions.
4. There appears to be industry consensus concerning the next generation lithography.
5. The properties of the photoresist itself are not critical to the feature resolution.
6. A lot of materials are sufficiently transparent to be used in refractive lenses or in masks.
7. A number of non-optical technologies have been introduced into
manufacturing process.
8. Moor’s law will continue to be effective only as long as the cost
per component continue to rise.

2/3. Find the following expressions in the text and compose examples of your own.
Optical lithography; to exceed the pace of most predictions; mercury lamps; g-line and i-line; patterning features; half the dimension of
the wavelength; to be sufficiently transparent; e-beam lithography; field
stitching; to fabricate without distortion; probability of succeeding.

10